In addition to providing a few instruction-set simulators (ISS), gliss allows you to simplify writing new ISS. You should give him the programmer's view of a microprocessor (the instruction-set architecture and the memory management issues) in a hierarchical formalism which avoids to completeley describe each instruction.
Coupled to a very small simulator (a few lines), the library generated by gliss allows you to verify the functionnality of softwares.
Coupled to a detailed micro-architectural simulator (especially the one provided in microlib), it allows you to measure performances, to explore architectural choices, …
The formalism used to describe an instruction set is an extension of sim-nML which has been developped at the Indian Institute of Kanpur. As a sim-nML file can be generated by gliss, the tools (such as the automatic generation of an assembler) developped at Kanpur should be usable.
Gliss runs under Linux and Solaris.
The download section contains the generator itself and an example of ISA description (the PowerPC 750) which can execute applications compiled using a cross-compiler for linux.
This software is distributed under the GPL license as published by the Free Software Foundation.
For any questions or if you want to be informed of further developments, please contact sainrat@irit.fr